Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. Alphawave Semi is extending its 8th generation of Interlaken IP with the introduction of Interlaken-Low Latency (LL) IP, which will enable low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications. Interlaken-LL IP can provide up to 256Gbps of reliable and scalable throughput between two chips; whereas the standard Interlaken IP from Alphawave Semi provides throughput of up to 1.2Tbps.
How Alphawave Semi’s Interlaken-Low Latency (LL) IP is enabling low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications.
Designers, Architects, Marketing
Ketan Mehta, Director, SoC IP Product Marketing, OpenFive
Sundeep Gupta, Senior Director – Engineering, OpenFive
Daniel Nenni, Founder of SemiWiki.com