DemeterCORE LPDDR5/4x PHY

Low-Power Double Data Rate (LPDDR) memory is used where area and power savings are key requirements. LPDDR also offers higher bandwidth compared to its DDR counterparts. The LPDDR5/4X IP subsystem is ideally suited for next generation computing such as Artificial Intelligence (AI) inference, Edge AI, as well as Internet of Things (IoT), automotive and mobile applications.

LPDDR5/4X PHY IP

The LPDDR5/4X is the next generation of low-power memory with 2X faster data transfers than its predecessor. The LPDDR device transfers data at higher rates with remarkable power efficiency. It also supports a unique low-power feature called Deep Sleep Mode (DSM) to reduce standby power even further.

Key Features

  • Compliant with JEDEC Standard JESD209-4B and JESD209-5B
  • Complaint with DFI 5.0 for PHY and Controller interface
  • Supports data rate up to 4266 Mbps for LPDDR4/4X and 6400Mbps for LPDDR5
  • Supports Data Bus Inversion (DBI) mode
  • Supports PHY independent training modes
  • Supports periodic re-training for DRAM write and read operation
  • Supports IO calibration and Programmable On-Die Termination (ODT) calibration
  • Supports Light Sleep and Deep Sleep Mode (DSM)
  • Supports Retention Mode and Self Refresh mode (core and IO power down)
  • Supports DRAM widths of x8 and x16 bits
  • Supports per-bit de-skew on read and write data path
  • Supports 16/32/64-bit data widths (two x32, one x32, or two x16)
  • Supports In-order, Out-of-order and look-ahead command processing
  • Supports equalization for TX and RX

Block Diagram

IP Customization

If you already have a specific SOC IP spec in mind, our team can help you to customize the controller IP as per your requirements.