Alphawave Semi to Showcase Latest Advances in AI and Connectivity IP at the Design Automation Conference (DAC) 2024
Highlights include industry’s first multi-protocol I/O connectivity chiplet, 128 Gbps PCIe 7.0 platforms, and connectivity IP for processes down to 2nm
Alphawave Semi joins expert panel and present on the Open Chiplet Economy and AI
LONDON, United Kingdom, and TORONTO, Canada – June 24, 2024 – Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity and compute silicon for the world’s technology infrastructure, will showcase its latest advances in AI and connectivity IP at the Design Automation Conference (DAC).
Taking place at the Moscone Center, San Francisco from June 23 to 27, DAC is recognised among the world’s leading events for chip and system developers.
The show follows several key announcements from Alphawave Semi that outline how next-generation connectivity technologies are enabling AI and HPC data centres – including the industry’s first multi-protocol I/O connectivity chiplet for AI infrastructure.
On Monday, June 24, Alphawave Semi’s Letizia Giuliano will present the paper ‘UCIe Compliance Validation Journey from System Simulation to Silicon’ (booth #1501). Tuesday, June 25 will also see Ms Giuliano join an expert panel discussion on ‘The Open Chiplet Economy and AI’ (presentation area #2012), to examine advances in AI-related IP, including high-performance D2D PHY IP and the soft IP relevant to AI.
Alphawave Semi’s recent advances in AI and connectivity IP
In June, Alphawave Semi announced it had taped out the industry’s first multi-protocol I/O connectivity chiplet for AI infrastructure. This chiplet uses TSMC’s 7 nm process to deliver exceptional performance and power efficiency, combining these with a standards-compliant IP portfolio of Ethernet, PCIe®, CXL® and UCIeTM (Universal Chiplet Interconnect Express) that gives a total bandwidth of 1.6 Tbps.
Further recently announced advances include the company’s IP subsystems for rapid implementation of the 128 Gbps PCIe 7.0 specification and its advanced technologies for the PCIe 6.0 ecosystem; its range of PCIe 7.0, 112G and 224G Ethernet, and UCIe IP for processes down to 2 nm; and its Arm® Neoverse™-based advanced compute chiplet for AI, data centre and 5G/6G networking infrastructure applications.
Join us for a coffee
Alphawave Semi’s booth and barista will be located in the first-floor exhibit hall (#1343).
About the presentations
Letizia Giuliano will present the paper ‘UCIe Compliance Validation Journey from System Simulation to Silicon’ at 4:45 p.m. PDT, on June 24, in the first-floor exhibit hall (#1501).
The Open Chiplet Economy and AI panel discussion takes place at 10:30 a.m. PDT, on June 25, in the second-floor presentation area (#2012).
For more information on Alphawave Semi visit http://awavesemi.com.
To learn more about Alphawave Semi’s latest technology announcements, please visit https://awavesemi.com/company/press-releases/.
About Alphawave Semi
Alphawave Semi is a global leader in high-speed connectivity and compute silicon for the world’s technology infrastructure. Faced with the exponential growth of data, Alphawave Semi’s technology services a critical need: enabling data to travel faster, more reliably, and with higher performance at lower power. We are a vertically integrated semiconductor company, and our IP, custom silicon, and connectivity products are deployed by global tier-one customers in data centres, compute, networking, AI, 5G, autonomous vehicles, and storage. Founded in 2017 by an expert technical team with a proven track record in licensing semiconductor IP, our mission is to accelerate the critical data infrastructure at the heart of our digital world. To find out more about Alphawave Semi, visit: awavesemi.com.
Alphawave Semi and the Alphawave Semi logo are trademarks of Alphawave IP Group plc. All rights reserved.
Media Contact:
Claudia Cano-Manuel
Grand Bridges Marketing Limited
press@awavesemi.com
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