Subsystems
Alphawave Semi’s Subsystems combine our industry leading PHY IP and interface controller IP for a total solution that is efficient in design and includes optional features that can be parameterized out.
Alphawave Semi’s Subsystems combine our industry leading PHY IP and interface controller IP for a total solution that is efficient in design and includes optional features that can be parameterized out.
The D2D IP Subsystem is targeted for heterogenous chiplet solutions in wired communications, AI, and HPC applications. With recent advances in package technologies, it is possible to route high-speed signals within a package connecting multiple dies either on an interposer or an organic substrate.
The HBM3/2E/2 IP is suitable for applications involving graphics, high-performance computing, high-end networking, and communications that require very high bandwidth, lower latency and more density.
High speed chip-to-chip interface protocol with scalable bandwidth, low latency and reliable data transfer over serial links. The latest generation supports up to 1.2 Tbps bandwidth with support for NRZ and PAM4 serial links.