Alphawave Semi’s Subsystems combine our industry leading PHY IP and interface controller IP for a total solution that is efficient in design and includes optional features that can be parameterized out.

Ethernet IP Subsystem

High-performance Ethernet controller IPs and Multi-Standard SerDes PHY IPs combined to create high-performance, low latency Ethernet subsystems for the entire range of Ethernet applications.

PCIe/CXL Subsystems

Best-in-class subsystems for the entire range of PCIe and CXL applications comprising high-performance PCIe and CXL controller IPs and Multi-Standard SerDes PHY IPs.

UCIe Die-to-Die (D2D) IP Subsystem

The GammaCORE UCIe D2D IP Subsystem is targeted for heterogenous chiplet solutions in wired communications, AI, and HPC applications. With recent advances in package technologies, it is possible to route high-speed signals within a package connecting multiple dies either on an interposer or an organic substrate.

HBM3/2E/2 IP Subsystem

The HBM3/2E/2 IP is suitable for applications involving graphics, high-performance computing, high-end networking, and communications that require very high bandwidth, lower latency and more density.