Chiplets

Alphawave Semi’s leading IP and custom silicon expertise is integrated into a foundation for prebuilt connectivity chiplets. This cost effective and flexible approach delivers connectivity at a higher bandwidth and lower power than traditional infrastructure solutions. Advanced package technologies have made it possible to intelligently combine various chip functions by stacking die onto a universal substrate. Using the N-1 (or even N-2) process for the IO chiplet can increase savings and decrease time to market by breaking up the SOC into smaller, more efficient building blocks.

The Benefits of Chiplets

Chiplets reduce the total die cost at the tradeoff of more complete packaging and manufacturing. Chiplets are at their most cost effective for large die with little redundancy, making favorable heterogenous integrations of application-specific chiplets. On next generation processes, the cost savings will continue to increase; chiplets can save up to 35% of cost of the larger die.

IO Chiplets

Reconfigurable ZeusCORE100 SerDes IO with integrated protocol controllers, security IP and AresCORE (that is, D2D-UCIe) IP that enables up to 1.6T of throughput at MR, XLR, and PCIe/CXL reaches.

  • Medium Reach Optical Driver Chiplet
  • Extra Long Reach Ethernet Chiplet
  • Combo PCIe/CXL/Ethernet Chiplet
  • 1.6T high speed IO Chiplet

Accelerator Chiplets

High performance, Arm® or RISC-V-based accelerator chiplets—enables data acceleration through Arm or RISC-V multi-core accelerator SOCs.

Memory Chiplets

Low Latency, high speed DDR5 and memory controller; includes multi-core CPU with L1 and L2 caches.