Chiplets: Building the future of SoCs

An online seminar to investigate the opportunities and challenges of chiplet-based systems.

Alphawave Semi keynotes and panels:

• July 24, 11:10 pm – 11:55 pm GMT+5:30: Taming Complexity – Building a Successful Open Chiplet Ecosystem – Panel discussion

  This Panel Discussion with industry experts is moderated by Nitin Dahad, Editor-in-Chief, embedded.com.

  What is the current state of the commercial chiplet ecosystem, and is a multi-company open ecosystem needed for chiplets to achieve their full potential? As we move from single company effort to a complex, multi-supplier ecosystem, we’ll discuss the biggest challenges we face, including the need to manage and reduce supply chain complexity, and doing so at reasonable cost. We’ll also talk about some of the practicalities. Do we have sufficient standards in place to enable the chiplet economy, and is there appetite for industry and vendors to collaborate on these standards? Who takes ownership of the process when chiplets come from multiple suppliers, and who is responsible for overall yield? And how do we ensure that all parts of the supply chain make money, including smaller companies and startups?

  Panelists:
  – Ramin Farjadrad , founding CEO, Eliyan
  – Mohit Gupta, Senior Vice President, Alphawave Semi
  – Nick Ilyadis, Vice President of Product Planning, Achronix
  – Kenneth Larsen, Product Management Director, EDA Group, Synopsys

 

• July 25, 12:00 am – 12:20 am GMT+5:30: Optimizing Next-Gen I/O Chiplet: Pioneering UCIe D2D Interconnects from 1.6 Terabits to 224 Gigabits

  Presented by Letizia Giuliano, Vice President, Alphawave Semi

  In this presentation, we will explore the benefits of adopting UCIe-enabled chiplet IP subsystems, featuring state-of-the-art Multi-Standard SerDes I/O connectivity for advanced AI solutions. As the need for more powerful compute capability continues to grow, the landscape and role of chiplets has become increasingly crucial for providing essential avenues for scalability, efficiency, and innovation in the infrastructure of next-generation AI data networks. We will review the obstacles associated with developing an interoperable 112G Multi-Lane and Multi-Standard I/O chiplet, and share detailed implementation insights and outcomes from Alphawave Semi’s Chiplet portfolio. Furthermore, we will demonstrate how AI connectivity use cases can be rapidly enhanced through the deployment of I/O Chiplets, which are vital for today’s multi-Terabit I/O systems. The presentation will conclude with a discussion on the challenges facing the industry and propose solutions for advancing scale-up and scale-out connectivity options to meet the networking bandwidth demands of future AI systems.

   

• July 26, 12:45 am – 1:45 am GMT+5:30: Unleashing AI Potential Through Advanced Chiplet Architecture

  Presented by Tony Chan Carusone, CTO of Alphawave Semi

  In this tutorial, Tony Chan Carusone, CTO of Alphawave Semi, explores the crucial advancements required to propel the next generation of computing, with a particular emphasis on AI as a transformative force reshaping our daily lives and data management systems. He highlights how pervasive connectivity, from extensive optical fiber networks to intricate chiplet wirings, is critical for AI functionalities. The discussion traces AI’s evolution over the last two decades. These developments are pivotal in meeting the computational demands, from teraflops to petaflops, while focusing on sustainability through chiplet-based designs. Additionally, he will delve deeper into the chiplet architecture, discussing how it revolutionizes cost and power efficiencies in AI applications. Tony will detail Alphawave Semi’s leadership in providing connectivity solutions specifically designed for chiplet architectures, including the groundbreaking UCIe interface that offers a path up to 10 Tbps/mm bandwidth density. The session will further examine how AI is transforming data infrastructure connectivity, highlighting the necessity for robust inter-chip links within datacenters and the reengineering of optical networks that cater to AI’s specific needs. The session wraps up by addressing the trend toward disaggregated computing and distributed data centers, facilitated by low-latency connectivity.

   

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