Alphawave Semi ‘Redefines Connectivity’ in AI Hardware and Edge AI Summit 2024 Presentation on Chiplet Interconnects
CTO Dr. Tony Chan Carusone to highlight how the transformational role chiplets have played in AI is extending to affect HPC, 6G and beyond
LONDON, United Kingdom, and TORONTO, Canada – September 5, 2024 – Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity and compute silicon for the world’s technology infrastructure, announces its CTO, Dr. Tony Chan Carusone, will deliver a speech on chiplets and connectivity at the 2024 AI Hardware & Edge AI Summit.
Taking place in San Jose, CA, from September 10 – 12, the annual summit brings together professionals from across the deep tech and machine learning ecosystems to explore advancements in AI infrastructure, edge AI deployments, and MLOps.
In his presentation entitled “Redefining Connectivity: Charting Next-Gen Pathways in Chiplet Interconnects”, Dr. Chan Carusone will examine how AI has emerged as the primary catalyst for the rise of chiplet ecosystems and how their application is extending beyond AI, with growing use in high-performance computing (HPC), next-generation 6G communication, and data center networking.
At the event, Dr. Chan Carusone will join other speakers, including Meta VP of Infrastructure, Dan Rabinovitsj, Cruise CTO, Mo Elshenawy, Microsoft Azure CTO, Mark Russinovich and Landing AI CEO/former Baidu Chief Scientist, Andrew Ng.
“I look forward to presenting at this highly prestigious event, especially given the recent breakthroughs in optical interconnects that have enabled AI systems to continue their significant pace of improvement,” said Dr. Chan Carusone. “The push for custom AI hardware is rapidly evolving, and I will examine how chiplets deliver the flexibility required to create energy-efficient systems-in-package designs that balance cost, power, and performance, without starting from scratch.”
Visitors to Alphawave’s booth #9 will get an exclusive look at the advanced HBM3 Sub-System designed for AI workloads, featuring a demonstration of the HBM3e IO loopback eye diagram operating at 9.6 Gbps on 3nm silicon. Additionally, Alphawave will showcase the AresCORE, the industry’s first 3nm 24Gbps UCI integrated with TSMC CoWoS® Advanced Packaging, including a live demonstration of D2D traffic at 24 Gbps per lane.
At the Samtec vendor booth #41, attendees can explore the PipeCORE – AW 128G PAM4 Gen7 solution in conjunction with Samtec’s 128G PAM4 NovaRay technology. This setup will exhibit a demo transmitting at 128 GT/s using Samtec’s board, demonstrating performance that exceeds a 30 dB channel.
The AI Hardware & Edge AI Summit 2024 is being held at the San Jose Signia By Hilton Hotel. Dr. Chan Carusone’s presentation, “Redefining Connectivity: Charting Next-Gen Pathways in Chiplet Interconnects”, takes place September 11 at 4 p.m. PDT. For further information, or to attend, the event visit https://aihwedgesummit.com/events/aihwedgesummit.
For more information on Alphawave Semi visit https://awavesemi.com.
About Alphawave Semi
Alphawave Semi is a global leader in high-speed connectivity and compute silicon for the world’s technology infrastructure. Faced with the exponential growth of data, Alphawave Semi’s technology services a critical need: enabling data to travel faster, more reliably, and with higher performance at lower power. We are a vertically integrated semiconductor company, and our IP, custom silicon, and connectivity products are deployed by global tier-one customers in data centers, compute, networking, AI, 5G, autonomous vehicles, and storage. Founded in 2017 by an expert technical team with a proven track record in licensing semiconductor IP, our mission is to accelerate the critical data infrastructure at the heart of our digital world. To find out more about Alphawave Semi, visit: awavesemi.com.
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