Ethernet Subsystem
High-performance Ethernet controller IPs and Multi-Standard SerDes PHY IPs combined to create high-performance, low latency Ethernet subsystems for the entire range of Ethernet applications.
High-performance Ethernet controller IPs and Multi-Standard SerDes PHY IPs combined to create high-performance, low latency Ethernet subsystems for the entire range of Ethernet applications.
Alphawave Semi Ethernet subsystems combine our highly configurable Ethernet controllers with our industry leading multi-standard SerDes PHY solutions to create highly flexible, high-performance, low-latency Ethernet subsystems that are silicon-proven in most advanced nodes.
Our Ethernet PHYs pair with our Ethernet controllers that are built to support all rates covering 10M to 1.6T PCS and MAC layer functions. They also include optional FEC functions (LL FEC RS (272, 258), KR4 FEC RS (528,514), KP4 FEC RS (544,514), FC FEC (2112, 2080). The controllers are fully verified using SystemVerilog UVM coverage-driven constrained random verification methodology (CDV and CRV).
Our Ethernet Subsystems uses the industry’s leading portfolio of Ethernet SerDes PHYs and support a wide range of data rates—from 1 Gbps to 224 Gbps—and multiple signaling schemes.