10G-800G Ethernet MAC and/or PCS/FEC

Support MAC layer, and/or PCS layer and FEC functions with Ethernet rates from 10G to 800G specified by IEEE 802.3 standards.

200G/400G/800G MAC/PCS/FEC

The 200G/400G/800G MAC/PCS/FEC Cores are cutting edge solution to the 200G/400G/800G Ethernet application. The Cores support the Physical Coding Sublayer (PCS) for 64B/66B, type 200G/400G/800GBASE-R function based on the Ethernet Technology Consortium and IEEE 802.3bs.

200G/400G/800G PCS/FEC Features

  • There are 4 PCS Cores: 200GBASE-R only, 400GBASE-R only, 800GBASE-R only and 200G/400G/800GBASE-R combined Core.
  • The PCS layer core supports 64B/66B encoding for transmission of data and control characters, 256/257B transcoding, FEC calculation, and data distribution to support multiple lanes in the Physical Layer. It includes insertion and extraction points for connection to an OTN layer.
  • This core is suitable for use in switch or interface cards or any application that requires a PCS for 200G/400G/800G.
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PCS Block Level Diagram

200G/400G/800G MAC Features

  • There are 4 MAC Cores: 200G MAC, 400G MAC, 800G or 200G/400G/800G MAC.
  • Comprehensive MAC/RS statistics are supported in all MAC Cores.
  • All MAC cores are designed with low latency and cut­ through features.
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MAC Block Level Diagram

50G/100G MAC/PCS/FEC

The interface to the PMA supports either 2x /4x25Gbps or 1x/2x50Gbps or none/1x100Gbps bi-directional, serial interface. The PCS sublayer includes encoding, transcoding, scrambling, FEC layer and symbol distribution. For a complete Ethernet solution, the PCS Core seamlessly integrates with the Alphawave Semi 50G/100G MAC core.

  • 50G PCS layer supports an interface for 50GBASE-CR or 50GBASE-KR.; 100G PCS layer supports 100GBASE-KR4/CR4 interface.
  • Support KR4 FEC (RS528,514) and KP4 FEC (RS544,514) modes
  • Fully compatible with IEEE802.3 3cd-2018 Standard and Ethernet Technology Consortium 50/100G Standard
  • Super low latency with minimized fixed and variable delay for network efficiency.
  • Supports 1588v2 time stamps and full error handling
  • Supports 802.3br express traffic and 802.1Qbb priority flow control (PFC)
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50G/100G Block Diagram

10G/25G MAC PCS/FEC

Alphawave Semi 10G/25G MAC/PCS/FEC is the fully integrated Physical Coding Sublayer (PCS), KR4 FEC and Media Access Controller (MAC) core for 25Gbps Ethernet applications which is complaint with IEEE 802.3by standard.

  • The interface to the PMA supports a single 10G/25Gbps bi-directional, serial interface.
  • The PCS sublayer includes 66B encoding, transcoding and scrambling.
  • This Core also supports CPRI-8, 9 and 10 PCS mode configurable through software register.
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10G/25G MAC Block Diagram

25GE/32GFC/CPRI10 PCS/FEC

The fully integrated PCS/FEC Layer core for 25Gbps Ethernet, FibreChannel 32GFC and CPRl-10 applications is complaint with IEEE 802.3by-2016 standard, ANSI Fibre Channel- Framing and Signaling (FC-FS-4/5) and Common Public Radio Interface (CPRI) Interface Specification, V7.0 (2015-10-09).

  • Supports both 10G/25GBASE-R PMD interfaces
  • Support 25G NRZ SerDes
  • Support for a single-lane SERDES interface
  • Optional KR4 FEC (528,514) RS FEC integration
  • Optional CPRl-8, 9 & 10 PCS Mode support
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25GE 32GFC CPRI10 Block Diagram

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