Q2-2024-Highlights from Alphawave Semi: Accelerating the Future

At Alphawave Semi, we remain dedicated to advancing connectivity solutions in AI, HPC, autonomous vehicles and 5G/6G networking. In this issue, we showcase significant breakthroughs we achieved in connectivity IP for these industries throughout the past three months.
Stay tuned for exciting updates and insights on our latest innovations.

In the Spotlight

9.2 Gbps HBM3E Subsystem Unlocks 1.2 TBps Connectivity for HPC and AI Infrastructure
In June, Alphawave Semi announced the PHY + controller IP subsystem for a 9.2 Gbps HBM3E silicon platform. This addresses demand for ultra-high-speed connectivity and accelerated compute, allowing for chiplet-enabled memory bandwidth at 1.2 TBps.

Industry’s First Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure Taped Out
Also in June, Alphawave Semi taped out the industry’s first off-the-shelf multi-protocol I/O connectivity chiplet based on TSMC’s 7nm process. The multi-standard I/O chiplet enables Ethernet, PCIe®, CXL®, plus UCIe™ and delivers a 1.6 Tbps throughput.

Expanded Partnership with Samsung Brings Alphawave Semi’s PCIe 7.0, 112G and 224G Ethernet, and UCIe IP to Foundry’s 5, 4 and 2 nm Processes
Extensive range of IP helps minimize design risks and accelerate the creation of next- generation chiplets for AI, HPC, data networking, autonomous vehicles and SSD storage.The collaboration takes these offerings to 2nm processes, with IP for next-generation compute and network connectivity.

Arm Neoverse CSS-based CPU Chiplet for AI, HPC, and Networking Infrastructure
Alphawave’s PCIe Gen 6.0 and 7.0, UCIe, 112/224G Ethernet and HBM subsystems aredeveloped for the latest Arm core technology, Neoverse. The result: A compute chiplet with the robust performance and flexibility critical to next-generation HPC, data center, AI/ML, and 5G/6G applications.

Design Automation Conference (DAC) 2024

Webinars / Video

Driving Data Frontiers: High-Performance PCIe® and CXL® in Modern Infrastructures – Webinar

Data consumption and interconnectivity are experiencing rapid growth, with more data sources and interactions. NVIDIA alone has more than 100 customers building AI factories, each with tens, or hundreds of thousands, of CPUs.

High-performance communication standards like PCIe and CXL, delivering speeds up to 128 Gbps per lane, are poised to drive the next phase of AI and machine learning advancements.

Join Alphawave Semi’s Director of Solutions Engineering, David Kulansky, in a 25-minute webinar, as he discusses these standards, optical and traditional architectural configurations, the role of IP building blocks in efficient interconnectivity, as well as how these lessons apply to real-world scenarios.

High-Performance PCIe® 7.0 & 6.0 IP Subsystems for Enhanced Connectivity and Computing – Video

This video showcases a PCIe subsystem (controller and PAM4 SerDes PHY) paired with LPO OSFP optics, supporting electro-optical links at 64 Gbps per lane for low-power, low-latency connections. It highlights PCIe subsystem interoperability in collaboration with VIAVI and the PCIe 6.0 subsystem silicon exceeding requirements over an OSFP-XD connector via a 4m cable.

Additionally, the video features a PCIe 7.0 PHY based on Alphawave Semi’s 112 Gbps Ethernet PHY, ramped up to 128 Gbps, in partnership with Tektronix, showcasing an impressive SNDR of 36 dB.

Up Next – Meet Our Team

Alphawave will be exhibiting and delivering keynote presentations, at the following events:

Chiplets: Building the Future of SoCs: July 24 – 26
An online seminar to investigate the opportunities and challenges of chiplet-based systems.

Alphawave Semi keynotes and panels:

• July 24: 11:10 pm – 11:55 pm GMT+5:30 (CC4) Panel Discussion: Taming Complexity – Building a Successful Open Chiplet Ecosystem
• July 25: 12:00 am – 12:20 am GMT+5:30 (CC5) Presentation: Optimizing Next-Gen I/O Chiplet: Pioneering UCIe D2D Interconnects from 1.6 Terabits to 224 Gigabits
• July 26: 12:45 am – 1:45 am GMT+5:30 (CP6) Tutorial: Unleashing AI Potential Through Advanced Chiplet Architecture

AI Hardware Summit: September 9 – 12
Summit seeks to foster learning and collaboration across the AI and machine learning ecosystem as it trains, deploys and scales machine learning systems that are fast, affordable and efficient.

Alphawave Semi keynotes and panels:

• CTO Tony Chan Carusone to present on communication protocols for faster data transmission across AI networks.

ECOC: September 23-25 (Conference September 22 – 26)

ECOC is Europe’s premier optical communications conference and exhibition.
Visit us at the exhibition: Stands B115, MR19.

We look forward to seeing you at these events. If you would like to arrange a meeting, or find out more information, please contact